I come from Kaohsiung city. I got my master degree in electrical engineering from National Cheng Kung University in last July. During my time there, I majored in writing Verilog code, video/image processing. My research task focused on the 3D video/image processing by utilizing FPGA boards. Since the difference between hardware and software design, we must reach an agreement on the specification at first. Through the teamwork, I eventually made the higher precision of stereo matching combined the brand-new format. The processing speed could achieve 60 frames per second with the resolution of 1920 × 1080 and 64 disparity levels in 160 MHz. Moreover, I have four years of experiences in digital IC contest and qualified the final in 2015. Therefore, I’m a true team player.
In regard to my personality, I always dedicate my passion to what I like. For example, during my military service, I spent my spare time creating a personal blog by using web code I never learned before. Up to now, I’ve posted six articles and the total page views are more than ten thousand in two months. That’s why my friends always say that I am a true go-getter.